A major requirement in improving board fabrication yields is doing it right the first time, because once the PCB fabrication process is complete there is really no way to go back to fix major mistakes. In some cases you can mitigate design issues during the PCB assembly process, but during PCB fabrication, once layers are laminated and the holes are drilled, you cannot easily undo the process to make corrections.
Therefore, to improve fabrication yields during and after design layout, it's critical to follow the detailed fabrication notes and drawings, specifically calling out every item that requires any kind of explanation. This includes stack up data, layer construction information, material call outs, as well as drill charts specifying hole counts and symbols, whether drill holes are plated, and any similar information.
Notes and drawings must not have sketchy or ambiguous information, nor should they lead the PCB fabricator to make "guesstimates" about some of the directions. Fabrication notes and drawings must have clear-cut and precise information in their instructions--assumptions are not allowed. If questions arise, the OEM customer should be consulted, and the OEM should resolve any uncertainties.
A good rule of thumb is to engage the fabrication house during PCB layout/design stage. After the designer creates the stack up for impedance control, it's a good idea to get it verified before the files are released to the fab house. Conversely, the fab house can play a reciprocal role by providing the designer with recommendations and suggestions for boosting yields. For example, a fab house may recommend material changes for a specific application that are better suited to increasing yields than those a designer specifies.
(http://www.entrepreneur.com/tradejournals/article/177870884.html)
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